Сomputer simulation of nanoelectronics arithmetic-logic devices

Сomputer simulation of nanoelectronics arithmetic-logic devices
O.S. Melnik, L.O. Tsapok

Abstract

This paper presents a quantum dot cellular automata two bit multiplier composed from simple 3-input majority gates and inverters. It is reviewed two different methods of conductors crossing and specifics of QCA devices construction correspondently. The way of device working area partition onto clocking zones is defined. Also it is defined the latency of designed multiplier. Research focuses on the design and simulation of QCA using numerical tools such as the QCADesigner tool.

Keywords

quantum cellular automata; majority gate; quantum full adder; two bit multiplier; clocking zone; coplanar crossing; multi-layer crossing

References

Tougaw, P. D. Logic devices implemented using quantum cellular automata / P. D. Tougaw, C. S. Lent // J. Appl. Phys., American Institute of Physics. – 1994.

Пакулов Н. Н. Мажоритарный принцип построения надежных узлов и устройств ЦВМ / Н. Н. Пакулов – М.: Сов. радио – 1974. – 184 с.

Bhanja, S., Ottavi, M., Lombardi, F., Pontarelli. S. OCA circuit for robust coplanar crossing. / S. Bhanja, M. Ottavi, F. Lombardi, S. Pontarelli // Journal of Electronic Testing. – 2007, – P. 193–210.

Мельник О. С. Автоматизоване моделювання наносхем на квантових коміркових автоматах / О. С. Мельник, В. В. Івахнюк // Електроніки та систем управління. – 2010. – №2. – C. 81–84.

Walus K. QCADesiner: A CAD Tool for an Emerging Nano-Technology / K. Walus // Micronet Annual Workshop – 2003.

Full Text: PDF